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W91610 series tone/pulse dialer with two-stage redial function publication release date: july 1996 - 1 - revision a3 general description the W91610 series are si-gate cmos ics that provide the signals needed for either pulse or tone dialing. features dtmf/pulse switchable dialer 32-digit redial memory two-stage redial function pulse-to-tone (p ? t) keypad for long distance call operation easy operation with redial, flash, pause and p ? t keypads pause, pulse-to-tone (p ? t) can be stored as a digit in memory tone output duration: as long as key is depressed or 90 ms minimum minimum intertone pause: 90 ms flash time: 100 ms uses 4 5 keyboard on-chip power-on reset uses 3.579545 mhz crystal or ceramic resonator packaged in 18-pin dip the different dialers in the W91610 series are shown in the following table: type no. dialing rate pause b:m flash W91610 10 pps 4 sec 2:1 100 ms w91611 3:2
W91610 series - 2 - pin configuration 1 18 r4 c1 c2 c3 c4 v 2 3 4 5 6 13 14 15 16 17 r1 r2 r3 mode v 7 8 9 10 11 12 dtmf dp/c5 hks xt xt t/p mute p mute dd ss pin description symbol pin no. i/o function column- row inputs 1 - 4 & 15 - 18 i keyboard inputs are designed for use with either a standard 4 5 keyboard or an inexpensive single contact (form a) keyboard. electronic input from a m c can also be used. valid key entry is defined by a connection between a single row and a single column. xt, xt 7, 8 i, o a built-in inverter provides oscillation with an inexpensive 3.579545 mhz crystal or ceramic resonator. t/p mute 9 o the t/p mute is a conventional cmos inverter output. it is low during pulse and tone mode dialing sequence and flash break; otherwise, it remains high. mode 13 i pulling the mode pin to v ss place the dialer in tone mode. pull to v dd or leave floating: pulse mode (10 pps, m/b = 2:3 or 1:2)
W91610 series publication release date: july 1996 - 3 - revision a3 pin description, continued symbol pin no. i/o function hks 10 i hook switch input. conventional cmos input with an internal protection diode and a pull-high resistor to v dd . hks = v dd : on-hook state. chip in sleep mode, no operation. hks = v ss : off-hook state. chip enabled for normal operation. during dialing, this input ignores hks = v dd for durations of less than 150 ms (i.e., dialing is not terminated). dp / c 5 11 o open drain dialing pulse output (figure 1). flash key causes dp / c 5 to be active in both tone mode and pulse mode. dtmf 12 o during pulse dialing, maintains low state at all times. in tone mode, outputs a dual or single tone. detailed timing diagram for tone mode is shown in figure 2(a, b). output frequency specified actual error % r2 r3 r4 c1 c2 c3 697 770 852 941 1209 1336 1477 699 766 848 948 1216 1332 1472 +0.28 -0.52 -0.47 +0.74 +0.57 -0.30 -0.34 r1 v dd , v ss 14, 6 i power input pins. p mute 5 o the p mute is a conventional cmos inverter output. it is high during pulse dialing sequence and flash break. otherwise, it remains low.
W91610 series - 4 - block diagram hks mode t/p mute column row xt xt p mute dp/c5 (r1 to r4) dtmf system clock generator read/write counter ram location latch row & column programmable counter data latch & decoder keyboard interface (c1 to c4) d/a converter pulse control logic control logic functional description keyboard operation c1 c2 c3 c4 dp / c5 1 2 3 p ? t r1 4 5 6 f p r2 7 8 9 r3 * 0 # r r4 f: flash key p ? t: in pulse mode, this key works as pulse ? tone key p ? t key can be stored as a digit in pulse or tone mode r: redial function key p: pause key normal dialing off hook , d1 , d2 , ..., dn 1. d1, d2, ..., dn will be dialed out.
W91610 series publication release date: july 1996 - 5 - revision a3 2. dialing length is unlimited, but redial is inhibited if length oversteps 32 digits in normal dialing. 3. dialing mode is determined at the on/off hook transition. redialing 1. off hook , d1 , d2 , ..., dn , busy, come on hook , off hook , r the r key executes the redialing function. 2. redial content = d1, d2, ..., dn off hook , r , d1' , d2' , p ? t , d3' , d4' a. d1, d2, ..., dn, d1', d2', p ? t, d3', d4' will be dialed out. b. redial register is changed to d1, d2, ..., dn, d1', d2', p ? t, d3', d4'. c. off hook , r (1st) d1, d2, ..., dn, d1', d2', will be dialed out, r (2nd); p ? t, d3', d4' will be dialed out. access pause off hook , d1 , d2 , p , d3 , ..., dn 1. the pause function can be stored in memory. 2. the pause function may be executed in normal dialing, redialing, or memory dialing (4.0 sec/pause). 3. the pause function can be stored as the first digit in memory. 4. the pause time depends on the number of times the p key is depressed. for example, if the sequence 1, 2, p, p, 4, 5, 6 is k eyed in, then the pause time is 8 seconds. 5. the pause function timing diagram is shown in figure 3. pulse-to-tone (p ? t) 1. off hook , d1 , d2 , ..., dn , p ? t , d1' , d2' , ..., dn' a. if the mode switch is set to pulse mode, then the output signal will be as follows: d1, d2, ..., dn, no pause, d1', d2', ..., dn' (pulse) (tone) in this case, the device can be reset to pulse mode only by going on-hook, because tone mode remains enabled after the digits have been dialed out.
W91610 series - 6 - b. if the mode switch is set to tone mode, then the output signal will be as follows: d1, d2, ..., dn, no pause, d1', d2', ..., dn' (tone) (tone) c. the p ? t key may be pressed before the first sequence is dialed out completely. 2. off hook , r a. if the mode switch is set to pulse mode, then the output signal will be as follows: d1, d2, ..., dn (pulse) b. in the first redial operation, only the digits before the tone key are dialed out. r (2nd) d1', d2', ..., dn' are dialed out. (tone) c. in the second redial operation, the digits after the tone key are dialed out. flash off hook , d1 , d2 , d3 , f , d4 , d5 , d6 1. the f key may be pressed before digits d1, d2, d3 are sent completely. digits d4, d5, d6 may be pressed during the 100 ms. flash period. 2. the flash key cannot be stored as a digit in memory or in the redial register. 3. the content of the redial register is d1, d2, d3, d4, d5, d6. the f key is not stored in the redial register. 4. the flash does not have first priority among the keyboard functions. 5. the flash pause time is 800 ms, so there is a pause of 800 ms between the flash and the next digit dialed (see figure 5). 6. the dialer will not return to the initial state after the flash break time has elapsed. 7. the flash function timing diagram is shown in figure 5. absolute maximum ratings parameter symbol rating unit dc supply voltage v dd - v ss -0.3 to +7.0 v v il v ss -0.3 v input/output voltage v ih v dd +0.3 v v ol v ss -0.3 v v oh v dd +0.3 v
W91610 series publication release date: july 1996 - 7 - revision a3 power dissipation p d 120 mw operating temperature t opr -20 to +70 c storage temperature t stg -55 to +150 c note: exposure to conditions beyond those listed under absolute maximum ratings may adversely affect the life and reliability of the device. dc characteristics (f osc. = 3.58 mhz, ta = 25 c, all outputs unloaded) parameter sym. conditions min. typ. max. unit operating voltage v dd - 2.0 - 5.5 v operating current i op tone, v dd = 2.5v - 0.30 0.50 ma pulse, v dd = 2.5v - 0.15 0.30 standby current i sb hks = 0, no load & no key entry - - 15 m a memory retention current i mr hks = 1, v dd = 1.0v - - 0.2 m a dtmf output voltage v to row group, r l = 5 k w 130 150 170 mvrms pre-emphasis col/row, v dd = 2.0 to 5.5v 1 2 3 db dtmf distortion thd r l = 5 k w v dd = 2.0 to 5.5v - -30 -23 db dtmf output dc level v tdc r l = 5 k w v dd = 2.0 to 5.5v 1.0 - 3.0 v dtmf output sink current i tl v to = 0.5v v dd = 2.5v 0.2 - - ma dp / c 5 output sink current i pl v po = 0.5v v dd = 2.5v 0.5 - - ma p mute & t/p mute output drive current i mh v mo = 2.0v v dd = 2.5v 0.2 - - ma p mute & t/p mute output sink current i ml v mo = 0.5v, v dd = 2.5v 0.5 - - ma keypad input drive current i kd v i = 0v, v dd = 2.5v 4 - - m a keypad input sink current i ks v i = 2.5v, v dd = 2.5v 200 400 - m a keypad resistance r k - - - 5.0 k w hks input pull high resistance r hk - - 300 - k w
W91610 series - 8 - input voltage low level v il pins 1, 2, 3, 4, 10, 13, 0 - 0.2 v dd v input voltage high level v ih 15, 16, 17, 18 0.8 v dd - v dd v ac characteristics parameter symbol conditions min. typ. max. unit keypad active in debounce t kid - - 20 - ms key release debounce t krd - - 20 - ms pre-digit pause t pdp1 mode pin = floating - 33.3 - ms 10 pps mode pin = v dd - 40 - interdigit pause (auto dialing) t idp 10 pps - 800 - ms make/break ratio m/b m/b = 1:2 - 33:67 - % m/b = 2:3 - 40:60 - dtmf output duration t td auto dialing - 90 - ms intertone pause t itp - 90 - ms flash break time t fb - - 100 - ms flash pause t fp - - 800 - ms pause time t p - - 4.0 - s pre-tone mute t ptm - - 70 - ms notes : 1. crystal parameters suggested for proper operation are r s < 100 w , lm = 96 mh, cm = 0.02 pf, cn = 5 pf, cl = 18 pf, f osc. = 3.579545 mhz 0.02%. 2. crystal oscillator accuracy directly affects these times.
W91610 series publication release date: july 1996 - 9 - revision a3 timing waveforms t pdp idp t t idp idp t idp t kid t 3 2 r pdp t b m t t t pdp pdp t t kid hks key in dp/c5 t/p mute p mute dtmf osc. low oscillation oscillation normal dialing auto dialing figure 1. pulse mode timing diagram timing waveforms, continued kid td t t t t krd krd itp t t t krd itp t t ptm t t ptm hks key in dtmf t/p mute dp/c5 p mute osc. high low oscillation oscillation kid itp figure 2(a). tone mode normal dialing timing diagram
W91610 series - 10 - oscillation td t t t itp itp t kid r ptm t hks key in dtmf t/p mute dp/c5 p mute osc. low high figure 2(b). tone mode auto dialing timing diagram
W91610 series publication release date: july 1996 - 11 - revision a3 timing waveforms, continued 2 2 p 4 b m m b kid pdp t t idp t idp t t pdp t idp t p low oscillation hks key in dp/c5 t/p mute dtmf p mute osc. figure 3. pause function timing diagram t/p mute 8 2 4 m b kid pdp t t idp t idp itp t t p t hks key in dp/c5 dtmf p mute osc. oscillation b m figure 4. p ? t operation timing diagram in normal dialing
W91610 series - 12 - timing waveforms, continued f kid t low oscillation hks key in dp/c5 t/p mute p mute dtmf osc. low f 3 t fp t fp t fb t idp figure 5. flash operation timing diagram headquarters no. 4, creation rd. iii, science-based industrial park, hsinchu, taiwan tel: 886-3-5770066 fax: 886-3-5792697 http://www.winbond.com.tw/ voice & fax-on-demand: 886-2-7197006 taipei office 11f, no. 115, sec. 3, min-sheng east rd., taipei, taiwan tel: 886-2-7190505 fax: 886-2-7197502 winbond electronics (h.k.) ltd. rm. 803, world trade square, tower ii, 123 hoi bun rd., kwun tong, kowloon, hong kong tel: 852-27516023 fax: 852-27552064 winbond electronics north america corp. winbond memory lab. winbond microelectronics corp. winbond systems lab. 2730 orchard parkway, san jose, ca 95134, u.s.a. tel: 1-408-9436666 fax: 1-408-9436668 note: all data and specifications are subject to change without notice.

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